The Unmoored Future: Computing in the Post-CMOS World
An exploration of three emerging branches of computing that challenge the semiconductor paradigm that has powered the modern world.
Gordon Moore (1929-2023), Intel co-founder and industry giant. Image credit: Caltech
CMOS computing is the platform or paradigm that has defined computing since the 1980s- it stands for Complementary Metal-Oxide-Semiconductor, and is what every computer, phone, data center, and frankly virtually everything, is built on in 2026.
Let’s briefly look at what computing is:
Fundamentally, computing is the transformation of information from one state to another, using a set of rules. Think of a thermostat converting a temperature difference (target - actual) into on/off, a navigation app transforming GPS coordinates into driving instructions, or a neural network turning “this specific group of pixels” into “dog”.
This is accomplished through the below process:
Data is represented as 1s and 0s (binary)
Transistors act as tiny electrical switches
Billions of transistors are connected together to form logic gates (AND, OR, NOT, others)
These logic gates are connected together to form larger structures, like adders, memory, caches, and processors
By switching on and off billions of times per second, these circuits transform input data into output data
Modern computing is the manipulation of binary information through vast networks of interconnected switches. Everything we see, videos, photos, audio, internet traffic, apps, AI, spreadsheets, comes from billions of transistors changing state according to the rules of Boolean logic.
Further reading on Boolean logic and circuits: Khan Academy, HowStuffWorks
Where do semiconductors come into play?
These are the physical foundation of transistors
CMOS did not begin in the 1980s, but that’s when it became technologically dominant as a framework, offering an ideal blend of speed, physical density (reducing the size of computers), and low power consumption.
Around this time, an observation from an engineer and future Intel co-founder named Gordon Moore had become increasingly credible. Back in 1965, Moore noticed that the number of transistors that could be economically placed on an integrated circuit (IC) doubled at a regular interval (~2 years). This became known as Moore’s Law.
Surprisingly, for an observation identified very early in the history of computing, it held true for half a century or more.
This was never a law of physics, but an observation of a manufacturing trend that became nearly self-fulling prophecy, guiding product roadmaps, research, and investment industry-wide. In 2026, where transistors are the size of billionths of a meter, there are a range of threats from heat, manufacturing and fabrication complexity/cost, quantum effects, and power consumption. There are diminishing returns in the framework of CMOS.
Moore’s Law is not dead, as research does continue in promising directions, but for economic and technological reasons, frontier chip research firms have been designing around a range of alternative or complementary visions for the future of computing and chip design. This post explores three of them.
1. Architectural Efficiency
Ultra-Low-Power Chips (TinyVers, ARM)
Modern computing has generally selected for performance- and rightly so. Devices have typically been stationary or in fixed form factors (desktop, laptop, phone), often with reliable power sources and reliably consistent, if ever-increasing, demands. More processing power, more memory, and more parallel computing. Energy needs were secondary, and solved partially through transistor scaling.
Things changed, and ultra-low-power chip designers approached the problem from the opposite angle: that energy demand is the primary constraint and performance has to fit within the limitations that arise. In 2010, the chip industry was focused on desktop and laptop computers, servers, and phones. 16 years later, we have wearable tech, industrial machinery is loaded with sensors and machine learning functions, and there are autonomous robots, intelligent defense systems, and even sensors and compute embedded in infrastructure.
If those sound like they’re built to solve different problems and thus have different needs, you’d be correct. In many of these applications, the cost of battery replacement can be significant due to distance and accessibility (i.e. a pipeline in Alaska or a sensor at the bottom of the Pacific). Turning months of maintenance-free operation into years is huge.
TinyVers is a prime example in this category. It was designed as a system-on-chip for machine learning needs at the extreme edge, such as always-on systems for IoT devices. Think voice recognition and system monitoring, particularly on devices that are reliant on battery and where milliwatts matter. It’s important to note that this is still CMOS computing- it’s just built around a different constraint.
While TinyVers pushes things to the very edge of power savings, I’d like to highlight that the entire success of ARM as an alternative to x86 processors, which itself is a major storyline in the world of compute, is based around “acceptable performance at a fraction of the power”. If ARM sounds familiar, it’s because they effectively became the dominant force in processing for phones and tablets over the past 20 years.
A reasonable analogy here is marine vehicles: a cigarette boat can cross the harbor quickly, but it burns fuel at a crazy rate. By comparison, a 40-foot cruising sailboat (the minivan of the sea) may move more slowly, yet can travel enormous distances on a fraction of the energy. Ultra-low-power computing follows a similar philosophy: maximizing useful work rather than raw speed.
More reading on TinyVers: ResearchGate, arXiv
2. Physical Reversibility
Reversible Computing (Vaire Computing)
Ultra-low-power chips arise from normal assumptions about computation and don’t challenge the framework of CMOS. It takes energy to compute, but let’s spend less energy to do so.
In conventional computing, information is routinely discarded because it simplifies system design. Reversible computing attempts to preserve that information, allowing computations to be "unwound" and reducing the thermodynamic cost associated with erasure. It’s important to understand:
If I know a bit is 1 or 0, I have information.
If I reset it and force it to 0 regardless of its previous state, I have destroyed information.
Physics imposes an energy cost on that destruction. The minimum energy (expressed as heat) generated by this is known as Landauer’s Limit.
There are other energy costs associated with a computer (electrical resistance, memory access, other physical friction). This field’s research pertains only to information-destruction.
Reversible computing looks to perform computations in a logically reversible way, where the outputs preserve enough information to reconstruct the inputs. Based on this, it should theoretically be possible to push the energy cost for the destruction of information to near-zero. The big question here is whether the complexity required to do so is of enough economic benefit to outweigh the cost.
Image credit: IEEE
If this vein of research is successful, the implications extend far beyond battery-powered devices. Data centers consume enormous amounts of energy, and much of that energy becomes heat that must be removed through cooling. Even modest improvements in computational efficiency could have outsized economic consequences, but there is hope for 10-1,000x improvement in energy efficiency.
One company pursuing this vision is Vaire Computing, a UK startup focused on practical reversible computing architectures. Early-stage and highly experimental, their architecture is built around adiabatic and reversible logic principles, which aim to minimize energy dissipation by preserving information and recovering electrical energy rather than allowing it to dissipate as heat.
An extremely rough parallel, if you'll follow me here, is a student who refuses to erase anything while solving a math problem. Every intermediate step remains visible on the page. It may look messier, but anyone examining the paper can reconstruct exactly how the solution was reached. Reversible computing operates on a similar principle: preserving information rather than throwing it away and starting over.
More reading on Vaire Computing: Jon Peddie Research
3. Thermodynamic Probability
Thermodynamic/Noise-Driven AI (Extropic, Normal Computing)
The Hidden Layer covered Normal Computing and thermodynamic computing in a previous post. This section is a refresher and tie-in to the post-CMOS future, and explores another player, Extropic.
Of these three research branches, thermodynamic computing is likely the most challenging to understand. It centers around the impact of noise on computing.
What is noise?
Noise is random electrical activity that occurs in any physical system. Because modern transistors are so small, heat, quantum effects, and other physical processes introduce randomness to computing.
Historically, this has been a problem that engineers have aimed to suppress and correct.
How could noise potentially be useful?
Not all computing problems (or problems generally) have a single simple solution. In many cases, especially in the realm of machine learning, it’s ideal to explore a solution space by searching through a number of possibilities.
What is the goal of thermodynamic computing?
Instead of fighting noise, companies like Extropic seek to harness it, using randomness in the computational process of their chips, particularly in the areas of AI and optimization workloads. This randomness is used in addition to traditional computation, for the purpose of exploring large solution spaces efficiently.
Extropic has developed a new type of hardware, that they call a thermodynamic sampling unit (TSU), which produces samples from an energy function distribution rather than completing a calculation as a CPU or GPU would. This design is tailor-made for AI workloads, and bypasses matrix multiplication, which is an energy-intensive part of those processes.
Let’s look at an example.
Imagine you’re designing an ideal global supply chain. There’s a huge range of variables- suppliers, factories, ports, transportation methods, distribution centers, tariffs. There are also constraints, such as lead times, transit times, demand, labor costs, all of which may change. There is likely no one correct design here- it depends on shifting priorities, and some designs may be more durable than others.
Problems like this are less about finding the right answer and more about exploring an enormous range of possibilities and identifying a set that are close to optimal. In complex optimization problems, randomness acts like a nudge, helping the system sample many possible solutions instead of repeatedly following the same path.
The implications here are a little different than the other areas- improvements would mostly be in the areas of probability or optimization problems, where there are huge potential efficiency gains. This could also introduce new classes of machine learning algorithms, and reduce hardware requirements for AI, improving scaling for model training.
Read the Hidden Layer’s post on Normal Computing’s Thermodynamic Chip
The Frontier Opens Again
These three branches of computing may have started as curiosities, but they are becoming economically essential. The limits of CMOS computing are not just physical, but questions of economic scale.
Data centers generate heat and noise and introduce quality-of-life concerns for neighbors.
AI workloads are creating energy strain.
Sensors and compute in every machine and device around us are seeing battery limitations.
As chip architecture diversity explodes, so will manufacturing and supply chain complexity.
To recap:
Ultra-low-power computing: same game, different priorities.
Reversible computing: same game, different assumptions.
Thermodynamic computing: potentially a different game entirely.
For the first time since the 1980s, computing is diverging instead of converging, which is unusual for an industry that is considered mature.
CMOS is not dying tomorrow, but it’s no longer sufficient by itself. There are paths to reduce the burden and make chips more cost and energy-conscious (and in many cases, more effective), and these will become strategically important in the coming decade.
All of these routes could yield returns, or none of them could- but that’s not necessarily the point. For the first time in 60 years, paths of computing research are diverging into the unknown.